Here is the info on how to do a 32 bank memory expansion


This is a response to the secrecy on a lot of the 303 and 606 modifications:

Here is how a 32 bank memory expansion is done.
Use 3 32Kx8 srams (ultra low power), you need to make sure that they have a data retention mode (only about 1ľA consumption). 1 32Kx8 chip for each 1kx4 chip.
connect VCC and VSS (+5V & ground)
connect the !OE pins (output enable) via 30k resistors to ground.
connect the write enable and chip enable lines.
connect the 4 data lines to 4 of the 8 data pins of the new chips (connect the unused ones to ground via 30k resistors)
connect the 10 adress lines to 10 of the 15 adress pins of the new chips.
Now you have 5 adress pins over.
Connect each of them via 30k resistors to VCC and each of them to 1 end of a switch and the other end of the switch to ground. When the switch is open these adress pins get a logical 1, when it's closed they get 0. With those 5 switches you can thus generate 2^5 = 32 binary adresses and so select the 32 memory banks.
The only thing left to do is to make sure the chips get in data retention mode when the 303 is off.
This is eather done by making !CE high when power is off or !OE high when power is off
here you have 3 chips and how they do there data retention.

UPD43256BCZ-70LL !CE high
GM76C256CLLP-70 !CE high
CY62256LL-70PC !OE high

If it's done by the !CE line solder two 30k resistors from pin 13 and 14 of (IC-2) to ground. (Might not be necessary but I'm not sure)
If it's done by the !OE line make a copy of the cirquit of R23,D4,R7 and Q4 (that goes from the cpu to the !WE pins) but connect R23 to the +6V supply (the main supply not the backup) and the collector of the transistor to the !OE pin.


There 'might' be some errors in this but it should give you a good idea. Just read the datasheets of the memory chips you wish to use and make sure all signals are ok for each mode (read/write/data retention).
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